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Published 20 hours ago • verified publisher icon intel

Add `unique` and `priority` to `If` statements

Open mkorbel1 opened this issue 3 years ago • 1 comments

Similar to SystemVerilog: http://www.verilogpro.com/systemverilog-unique-priority/

mkorbel1 avatar Sep 23 '21 19:09 mkorbel1

I want to take this one

dmetis avatar Sep 22 '23 17:09 dmetis