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Fix some Non-Contiguous CBM capability detection issues on Intel, AMD and Hygon platforms

Open shenxiaochen opened this issue 1 month ago • 2 comments

Fix some Non-Contiguous CBM capability detection issues on Intel, AMD and Hygon platforms

Description

Fix three issues of L3/L2 cache Non-Contiguous CBM capability detection on Intel, AMD and Hygon platforms: (1) lib: Fix L3 cache Non-Contiguous CBM capability with MSR interface for AMD and Hygon (for AMD and Hygon) (2) lib: Add L3 cache Non-Contiguous CBM capability detection with OS interface (for Intel, AMD, and Hygon) (3) lib: Add L2 cache Non-Contiguous CBM capability detection with OS interface (for Intel)

Affected parts

  • [x] library
  • [ ] pqos utility
  • [ ] rdtset utility
  • [ ] other: (please specify)

Motivation and Context

Fix three issues of L3/L2 cache Non-Contiguous CBM capability detection on Intel, AMD and Hygon platforms. Detect and display the correct L3/L2 cache Non-Contiguous CBM capabilities.

How Has This Been Tested?

(1) Passed "pqos -d" test:

$ pqos --iface msr -d | grep "Non-Contiguous CBM"
                Non-Contiguous CBM: unsupported/supported

$ pqos --iface os -d | grep "Non-Contiguous CBM"
                Non-Contiguous CBM: unsupported/supported

(2) Passed all tests in intel-cmt-cat/unit-test.

Types of changes

  • [x] Bug fix (non-breaking change which fixes an issue)
  • [ ] New feature (non-breaking change which adds functionality)
  • [ ] Breaking change (fix or feature that would cause existing functionality to not work as expected)

Checklist:

  • [x] My code follows the code style of this project.
  • [ ] My change requires a change to the documentation.
  • [ ] I have updated the documentation accordingly.

shenxiaochen avatar Nov 24 '25 09:11 shenxiaochen

Note: The code base of this PR is on top of #300 and #299

[This PR - #302 ] c5c2c0c34af9 lib: Add L2 cache Non-Contiguous CBM capability detection with OS interface 2f6eb17e8069 lib: Add L3 cache Non-Contiguous CBM capability detection with OS interface 5c544336c968 lib: Fix L3 cache Non-Contiguous CBM capability with MSR interface for AMD and Hygon

[PR #300 ] b981133f6cbb lib: Set fixed MBM counter length for Hygon 90c603e5a527 lib/python: Add support for Hygon Platform QoS features c5cc545aa775 lib: Add support for Hygon Platform QoS features

[PR #299 ] 6a4d7647594d lib: Fix incorrect bitmask for MBM counter length

Best regards, Xiaochen

shenxiaochen avatar Nov 24 '25 09:11 shenxiaochen

Hi Xiaochen, Thanks for the contribution, we will review and get back to you soon. This may take a week or so given the US holiday this week. Thanks, ~Andrew

ajherdri avatar Nov 24 '25 17:11 ajherdri