chisel2-deprecated
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High Impedance state for wires
It would be greatly beneficial if Chisel had a high impedance state for wires. This would be equivalent to the Verliog 1'bZ.
What's the use case?
On Thu, Mar 13, 2014 at 2:22 PM, Farzad [email protected] wrote:
It would be greatly beneficial if Chisel had a high impedance state for wires. This would be equivalent to the Verliog 1'bZ.
Reply to this email directly or view it on GitHubhttps://github.com/ucb-bar/chisel/issues/158 .
External memories usually have bi-directional data pins. In VHDL/Verilog, these are handled through applying a high impedance state while the memory chip drives these pins. Being able to have tri-state signals in Chisel would eliminate the need for a VHDL/Verilog top-level file to do the tri-state handling.
jeuneS2 is correct. Also, there are many different network and router architectures that makes use of fast paths, bidirectional buses, and multi-driver buses, all of which require the use of a tri-state/high impedance.
Makes sense.
We initially eschewed Z consciously because it's not common a feature of modern synthesized ASICs and would obviously be a source of bugs. The assumption was that the top-level module for a chip would virtually always be in Verilog/VHDL, anyway, so Wolfgang's workaround wouldn't be unreasonable. And the black box functionality could handle Z for internal modules.
One issue is how to represent this in the C++ emulator and on FPGAs: we're reluctant to add features to Chisel that only apply to certain backends. I guess they can just be turned into muxes for those backends, with a runtime assertion that only one driver is active and randomization if no driver is active.
On Thu, Mar 13, 2014 at 3:51 PM, Farzad [email protected] wrote:
jeuneS2 is correct. Also, there are many different network and router architectures that makes use of fast paths, bidirectional buses, and multi-driver buses, all of which require the use of a tri-state/high impedance.
Reply to this email directly or view it on GitHubhttps://github.com/ucb-bar/chisel/issues/158#issuecomment-37596811 .
