systemrdl topic

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

Juniper

SystemRDL 2.0 language compiler front-end

SystemRDL

Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

sdnellen

Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

SystemRDL