chisel topic

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel

bu-icsg

The batteries-included testing and formal verification library for Chisel-based RTL designs.

ucb-bar

A compact guide to network pivoting for penetration testings / CTF challenges.

t3l3machus

A dynamic verification library for Chisel.

chiselverify

Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.

MaxXSoft

(System)Verilog to Chisel translator

ovh

Chisel components for FPGA projects

maltanar

lldb命令-symbolic

luoqisheng

high-performance RTL simulator

ucsc-vama

Provides dot visualizations of chisel/firrtl circuits

freechipsproject