FPGAs changes and fixup, ethernet, pcie, constraints

Changes:

• Re-wired properly the JTAG chain on island disable
• Added the safety + spatz config
• Corrected pulp cluster CDC constraints
• Modified device tree structure to have a new PCIe top level dts
• Modified PCIe ranges in block design
• Added reconfigurable MAC address and ethernet boot image path
• Added CVA6-sdk as a subrepo as in Cheshire
• Modified CI accordingly (please see PR) (auto select available board + remote boot possible)

Status:

• Ready, boots over ethernet and [pulp cluster implements](https://iis-git.ee.ethz.ch/github-mirror/carfield/-/pipelines/86456.

Just one comment on the CVA6-SDK, overall I did not spot anything proud of notice. One question, I see you have added a DTS for booting on VCU118 and also made some of the scripts more "agnostic" towards the kind of board. Do you think it would make sense to also merge in this branch the changes to support the VCU118?

I removed it, it will be part of the next PR

@yvantor or @alex96295 this is now ready for review

CI failed due to limited disk space, restarted it this morning

What do you think @yvantor @alex96295 ?

Thanks! I will review it next week