core-v-verif
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openhwgroup
uvml_hrtbt_mon_c is created using new()
In uvml_hrtbt_pkg.sv the monitor is created with new(), instead of create().
Steps to Reproduce
This is a lint issue, not a functional issue, so no instructions to run a sim are required to reproduce the issue. The violation is here: https://github.com/openhwgroup/core-v-verif/blob/cdf7ee911e6f2268cf98f2bc6e0f7e484a7f396d/lib/uvm_libs/uvml_hrtbt/uvml_hrtbt_pkg.sv#L37
Additional context
AMIQ EDA uses core-v-verif as a publically viewable demo of their Verissimo SV/UVM linter tool. Reports are available here.
@gabrielrad, just giving you an "@ mention" so you'll get an email about this issue. No action required on your part.
Removing the cv32e40p label as this is a library component. Eventually the fix/waiver will propagate to the main branch of this repo and impact all environments which use this heartbeat.
There is no UVM factory available to use at that point in simulation time. Attempting to use it to create the default heartbeat monitor will result in a fatal error.
