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Develop an end-to-end hypothetical reference model, network architectures, performance objectives and the methods to distribute, operate, monitor time synchronization within data center and much more....

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Release the latest package with updated HW design for Timecard. Previous versions will be stashed in a separate directory with their respective FPGA firmware binaries. *NOTE: This is only for...

documentation
enhancement

The NetTimeLogic Configuration Manager can only run under windows system. Q4: Is there any command in linux system to switch PPS source from FPGA to GNSS or MAC?

1. "Time-Card\SOM\FPGA\Readme.pdf" shows that ANT1 and ANT2 are input ports; However, "Time-Card\ECAD\Beta-V1\USER_IO.SchDoc" shows that ANT1 and ANT2 are output ports; Futhermore, i can only get 10MHz (from my crystal oscillator)...

"Time-Card/SOM/FPGA/TimeCard_FPGA.png" shows an extra GNSS receiver (UART and PPS connections) as well as an UART in the upper left that is not labelled. These don't appear on the SOM connector...

- What is "RV-3049-C3" (U10A and U10B, p.5,A3)? - The labels on the off-page connectors on p. 6 seem to be interspersed with CR (0x0d) characters. The corresponding net names...

MAC_USB_PWR goes to connector P1B-B8 and thence to FPGA pin V8, IO_L14P_T2_SRCC_13, per the AC7100 schematics. This is curious, since USB power is +5V and there is no +5 going...

The +3.3V step-down regulator on p. 2, C3 has a max current rating of 2 A, for 6.6 W power. Since the PCIe connector allows for up to 9.9 W...

The vertical hole centers are referenced to the top surface of the short bend section at the upper end of the bracket. This position, being on the outside of the...

**BOM** - item 41 (DS3231 RTC) shows "U5" as ref des. schematic shows "U3A" - item 40 (1x3 header) does not have corresponding jumpers - item 29 (IC REG BUCK...

There is a reason why is this a hard limit or is it that lower has not been tried. If this card can work with generation 2.0/2.1 this opens a...