ODSA-BoW
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Repo for all activity related to the ODSA Bunch of Wires Specification
Bump patterns - suggestions from Test Chip group 1) min bidi: side by side 2) change from checkerboard to alternating columns 3) offset slices Decision: make these three changes
Hello @bapivee , First of all nice document! I am working in the field of ESD at Intel and I currently make some research regarding ESD and EDA for the...
4/21/21 1. Put 10^-15 back into the objectives for base level interoperability. 2. Eric/Elad will define statistical characteristics including eye width/eye height. Relax receiver eye height to 40% - might...
is it possible to have a reference to the Xtalk equation in section 6.4.3? Xtalk Limit = -10 dB -37dB.e^(-f/8GHz)
BoW Objectives (as presented at OCP workshops based on ODSA Industry Surveys) * A set of backward compatible die-to-die parallel interfaces that provides the flexibility to trade off Throughput/wire, design...
https://github.com/opencomputeproject/ODSA-BoW/blob/fcfbb6a3fc3d463f3ee4b81ce77c2b15393e2d49/spec/bow_specification/bow_specification.mdk#L385 Required, permitted, range/fixed etc, rail-to-rail vs low voltage. Leverage industry standard JEDEC voltages. Propose 1-2 bands to minimize energy per bit, maximize interoperability. Also be cognizant of oxide thickness...
Define BoW Basic for Laminate by March - work our way outwards Issues, 28/14 - VDD - converge on 0.75 Issues 34/35 - wiring study - Ken Poulton from Keysight,...
Table in section 5.1 Timing for 1-4GHz should say "No" Termination. That would make it consistent with the assertion that for electrically short links termination is not necessary, similar to...
https://github.com/opencomputeproject/ODSA-BoW/blob/009cd9eda3e79b7c0bf5f1e7520417e303ed1640/spec/bow_specification/bow_specification.mdk#L382 Add information on the eye diagram, ratify channel model