esp-hal

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Most embedded Rust HAL's only need to worry about single core access to peripherals. Even chips with dual core, such as the stm32h7 series only support one of the two cores: https://github.com/stm32-rs/stm32h7xx-hal. What does this mean? Interrupt free critical sections are not enough to guarantee mutual exclusion on multicore systems.

In the original esp32-hal, we used spin locks internally - this is also what esp-idf does too. Perhaps there is a better way, and if there isn't how can we add spin locks cleanly in this new hal.

I think with #87 we will get a good solution for this. Also then we might reconsider if we want synchronization done by the HAL or leave that to the user (while I liked the later approach I might change my mind once we have #87 in)

#87 has now been closed.