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Published 20 hours ago • verified publisher icon Xilinx
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Vitis Model Composer Examples and Tutorials

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Example HDL: AXI DDS Compiler, Simulink period set to 1 despite frequency is 1Mhz

Hello, I want to check the output frequency of DDS with spectrum analyzer. But the example told to set Simulink period in Vitis hub settings to 1. This causes spectrum...

mohammadsdtmnd avatar mohammadsdtmnd

Lab6 - XPAR_LAB6_1_0_DEVICE_ID in hello_world_final.c is not declared

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XPAR_LAB6_1_0_DEVICE_ID in hello_world_final.c (line 237) is not declared anywhere. I tried XPAR_HDL_DUT_0_DEVICE_ID instead, but that is also not declared anywhere.

RaulAguilarOH avatar RaulAguilarOH

FIR TDM coefficient script added to model properties

SrilakshmiDegala avatar SrilakshmiDegala

Adding Updated RF-FFT example

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SrilakshmiDegala avatar SrilakshmiDegala

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Vitis Model Composer Examples and Tutorials

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