Mike Thompson

Add IP worksheet (tab)

2

This update adds the "IP" tab to the TRL-5 checklist. It is a spreadsheet version of [IPChecklist.md](https://github.com/openhwgroup/programs/blob/master/Project-Descriptions-and-Plans/CV32E40Pv1/Milestone-data/RTL_Freeze_v1.0.0/IPChecklist.md) created for the CV32E40P v1.0.0.

The CVE2 cores do not have their own section header

2

Once #599 is merged in, `docs/cores.rst`, the `CVE4 Series of CORE-V Cores` and `CVA6 Series of CORE-V Cores` will have their own section header, but not the CVE2 Series. It...

Move milestone templates

1

After completion of #592 and #593, the templates for our program milestones are located at `Project-Descriptions-and-Plans/CV32E40Pv1/Milestone-data/templates`. This is not a good location as these templates are intended to be generic,...

More updates may be pending...

### Bug Description In the [apb_gpio](https://github.com/openhwgroup/core-v-mcu/blob/31af0754398729278e3bdf628294a46324ad4253/rtl/apb_gpio/rtl/apb_gpio.sv#L102) module of CORE-V-MCU we have a couple of code blocks that are similar to the code snipit below. This implements a combinatorial loop on...

Add programming example for micro-DMA function

5

### Task Description Currently the micro-DMA chapter of the User Manual is a description of how the uDMA works. We need a programmer's view that explains how to write/read the...

Many UART CSRs are volatile

2

Update to the uDMA UART chapter to define the term `volatile CSR` and indicate which of the UART CSRs are volatile.

Complete the APB Advance Timer chapter of the User Manual

2

A (mostly empty) shell of the APB Advanced Timer peripheral exists at `docs/doc-src/ip-blocks/apb_adv_timer.rst`. This chapter needs to be updated such that the Reader understands _what_ the peripheral does, a high-level...

[TASK] uDMA: peripheral selects

1

### Task Description Update the [Micro-DMA Subsystem](https://docs.openhwgroup.org/projects/core-v-mcu/doc-src/udma_subsystem.html) chapter of the User Manual to explain selects of the various uDMA peripherals. ### Description of Done Accepted pull-request. ### Associated PRs _No...

QSPIM1_CSN3 is not accessible

2

### Is there an existing core-v-mcu bug for this? - [X] I have searched the existing bug issues ### Bug Description The IO assignments in [pad_control.sv](https://github.com/openhwgroup/core-v-mcu/blob/7dd49c4e70ee848cb50345a5d7c7520bb4c9fe08/rtl/core-v-mcu/top/pad_control.sv#L199) do not include `QSPIM1_CSN3`,...