dynamorio

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As discussed in a RISC-V related pull request, none of the dr_mcontext_flags_t flags cause the floating point control and status registers to be saved/restored. I have a similar case where RISC-V has a floating point control and status register without having a condition flags register (all conditional branches perform arithmetic comparisons as part of the instruction).

In both AArch64 and RISC-V case the floating point registers should be handled for dr_get_mcontext() and dr_set_mcontext(). The question is which flag should they fall into? Perhaps DR_MC_CONTROL fits the picture best?

Or perhaps there is some reason behind this lack of register save/restore that I'm missing?

It looks like FPCR and FPSR are properly preserved in DR context switches and on clean calls (xref #2796 on inlining support missing) so this would not affect core DR but only clients.

@AssadHashmi might know more: but my guess is that this could cause application state corruption, if the client calls dr_get_mcontext and then dr_redirect_execution or dr_set_mcontext.

drwrap, drbbdup, and other key libraries use these routines. It's possible this affects drmemtrace: though the uses in drwrap and drbbdup may not be triggered by drmemtrace's use of those libraries.