fomu-workshop

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Currently the following happens; ``` 0.36s$ python ./get-toolchain.py Traceback (most recent call last): File "./get-toolchain.py", line 158, in sys.exit(main(sys.argv[1:])) File "./get-toolchain.py", line 113, in main toolchain_data = get_toolchain_data() File "./get-toolchain.py",...

mithro

gdb: wishbone-tool default port is 1234

4

wishbone-tool server defaults to 1234: https://github.com/litex-hub/wishbone-utils/blob/master/wishbone-tool/src/main.rs#L232 ``` pdp7@x1:~/dev/fpga/fomu-workshop/riscv-blink$ wishbone-tool -s gdb INFO [wishbone_tool::bridge::usb] opened USB device device 044 on bus 001 INFO [wishbone_tool::server] accepting connections on 127.0.0.1:1234 ``` ``` pdp7@x1:~/dev/fpga/fomu-workshop/riscv-blink$...

pdp7

This adds a BASIC touch support to the verilog blink example

6

I wonder if theres a better way to use touch in verilog, i was told that those pads on the pvt version are connected straight to the fpga but in...

LeonFedotov

Can't "make env" on MacOSX

2

Using: MacOSX Catalina 10.15.3 When running make env you are downloading Miniconda3-latest-Linux-x86_64.sh. On a Mac I believe you should be downloading Miniconda3-latest-MacOSX-x86_64.sh After changing the Makefile to download the different...

mgastel

Add a nmigen example

4

It would be awesome to have a nmigen example in the tutorial.

mithro

Misunderstanding on Migen and LiteX page

4

This issue concerns the [Migen/LiteX](https://github.com/im-tomu/fomu-workshop/blob/master/docs/migen.rst) page of thu tutorial. It was not clear where I had to copy paste the extra Python code for adding the `fomu_rgb` `csr_register`. In particular...

brnbrnrd

Add SpinalHDL example

1

It would be good to have examples of SpinalHDL examples on the fomu-workshop. The Fomu uses VexRiscv internally (see https://github.com/SpinalHDL/VexRiscv). It would be awesome to be able to use a...

mithro

Some potential interesting links; - [ ] nmigen tutorial from https://github.com/RobertBaruch/nmigen-tutorial - [ ] FPGA 101 from _florent_ at https://github.com/litex-hub/fpga_101 - [ ] others?

mithro

mithro

Explain where the generated Fomu files are and where they come from

2

"If we look at the generated Fomu header files, we can see many, many memory-mapped registers. For example, the major, minor, and revision numbers all have registers:" This fragment refers...

mgielda