Hudson Ayers

It might be nice (for use cases like Tock's) to just have a cargo flag that would disable `-C metadata=hash` being passed to rustc at all

@tnballo I recommend adding a rust-toolchain file and pegging a particular nightly to each of your examples to simplify the process of replicating your results. If you pass the -A...

How are we going without the boot ROM in this PR? Or is the change here just that the QEMU tests no longer exercise the boot ROM, but verilator /...

Reading through this, I would also lean towards Option C, primarily because it is the only option which does not add significant overhead (complexity/boot time/code size) to processes which do...

> I agree. The problem is that a bug snuck into elf2tab; the question is whether we fix the bug so the system goes back to behaving as documented/designed or...

I got the litex_ci to run locally (I pretty much just copy pasted all the commands from `.github/workflows/litex_sim.yml`), but it does not pass. The kernel boots, but `c_hello` never runs....

litex_sim with `debug_load_processes`: ``` Verilated LiteX+VexRiscv: initialization complete, entering main loop. Loading processes from flash=0x00080000-0x000FFFFF into sram=0x40003400-0x4FFFFFFF Loading process from flash=0x00080000-0x000FFFFF into sram=0x40003400-0x4FFFFFFF No more processes to load: App flash...

Going to point out that there was a lot of discussion on improvements for the flash HIL here: https://github.com/tock/tock/issues/1459 . Those changes are much further reaching than those in this...

> Thanks @hudson-ayers > > From a quick look this PR seems to address most of the issues besides the problem or writing/erasing a flash bank that we are also...

> Incorporating some of the thoughts in #1459 would be good. It's also worth noting that in most NAND chips the write unit and erase unit are _not_ the same:...