Please support the fx2lp inside the saleae logic analyzer!

[0wwafa]

Inside these devices

There is an FX2LP.

The 10 pins out are 8 (PORT B) and 2 GND

If I try fx2pipe/fx2pipe -d=0x925:0x3881 -a|hexdump -vC I get no data. even if the device is not connected to anything.. shouldn't I get all 00 or all FF?

[hoglet67]

fx2pipe with the -a option expects an external clock, but this device doesn't have an external clock input.

What happens if you remove the -a option? (This should capture data using an internal clock)

Without an external clock there isn't much point using fx2pipe / or the 8-bit wide mode of the 6502 Decoder.

Dave

[0wwafa]

@hoglet67

I just wish to sample or output on th 8 pins of PORT B. can you help? fx2lafw can only sample. I need both directions... get 8 pins of port b to usb at maximum speed and the opposite.

[0wwafa]

@hoglet67 for example, I can do:

sigrok-cli -d fx2lafw --config samplerate=24MHz -o dump.bin -O binary --time 1s

and I get the dump of the 8 pins (channels as they call them).

with fx2pipe I need to do the same and the opposite (output dum.bin back to the 8 pins).

Please help.

[0wwafa]

Without an external clock there isn't much point using fx2pipe / or the 8-bit wide mode of the 6502 Decoder.

I know that, @hoglet67 , I don't need it for 6502 but to log the 8 pins and the replay what I logged back to the 8 pins.

Can you kindly help?

[hoglet67]

OK, thanks for the additional context. I had assumed this issue related to it's use with 6502Decoder.

Have you seen the original fx2pipe documentation: https://www.triplespark.net/elec/periph/USB-FX2/software/fx2pipe.html

It should support transfers in both directions, without an external clock.

To get the dump of the 8 pins:

fx2pipe -d=0925:3881 -s -i > dump.bin

To output the dump back to the 8 pins:

fx2pipe -d=0925:3881 -s -o < dump.bin

Do these examples not work for you?

Can you describe what happens exactly in each case?

Also what OS are you using? fx2pipe uses an old version of libusb that's broken on recent Kernels.

(BTW, I'm not the developer of fx2pipe; I just made a few small changes)

[0wwafa]

@hoglet67

~/6502Decoder/fx2pipe$ ./fx2pipe/fx2pipe -d=0925:3881 -s -i > dump.bin
Firmware config: 0x12 0xc3 0xe0 0x0d 0x12
IO loop running...
Downloading firmware [builtin]...
Submitting max. 16 URBs to fill pipeline... 16 submitted
^Creap_rv=-1, errno=Interrupted system call   [ I pressed control C after 17 seconds ]
OOPS: ProcessEvents: ec=4
IO loop exited
Cancelled 16 pending URBs (npending=16), reaping... done reaping (16): npending=0
fx2pipe: 0 bytes in 17.173s (avg 0 kb/s)

[0wwafa]

This for example works:

~/6502Decoder/fx2pipe$ sigrok-cli -d fx2lafw --config samplerate=24MHz -o /dev/stdout -O binary --time 1s >dump.bin
~/6502Decoder/fx2pipe$ ls -al dump.bin 
-rw-rw-r-- 1 user user 24000000 Feb 13 22:26 dump.bin

I just want a similar thing but bidirectional.

[0wwafa]

and the same happens when using the output:

~/6502Decoder/fx2pipe$ ./fx2pipe/fx2pipe -d=0925:3881 -s -o <dump.bin
Firmware config: 0x21 0xc3 0xa0 0x11 0x12
IO loop running...
Downloading firmware [builtin]...
Submitting max. 16 URBs to fill pipeline... 16 submitted
^Creap_rv=-1, errno=Interrupted system call     [pressed control C after 15 seconds]
OOPS: ProcessEvents: ec=4
IO loop exited
Cancelled 16 pending URBs (npending=16), reaping... done reaping (16): npending=0
fx2pipe: 0 bytes in 15.220s (avg 0 kb/s)

it's like in both cases it's waiting for some timing/clock while it should use the internal clock and just input/output data.

[hoglet67]

Also what OS are you using? fx2pipe uses an old version of libusb that's broken on recent Kernels.

Please can you answer this question?