Harrison Liew

I see. Can you try converting it to VCD and reading that into Voltus instead (override the waveforms key)

The `power.inputs.waveforms` key (set via `vlsi/Makefile` into the `power-inputs.yml` file).

No, edit `power.inputs.waveforms`, otherwise you'll need to run the `sim-to-power` step again. This way you can directly run `power-par`.

You can run the `redo-power-par` target. This removes all the previous flow dependencies.

Ok, so it looks like it was able to run the `read_activity_file` (line 40) with the VCD file instead of the VPD. I'll make an issue in hammer-cadence-plugins to investigate...

We need to fix the simulation timeout first so that your waveforms aren't 0.01s long. Unfortunately, there is a fix for ASAP7 SRAM behavioral models (ucb-bar/hammer#645) that hasn't yet made...

Ah, the vlsi Makefile always expects an SRAM compiler to be run, so you will need to remove the `sram_generator` step within these lines: https://github.com/ucb-bar/chipyard/blob/main/vlsi/Makefile#L80-L101 as well as the dependence...

> May I suggest changing the documentation chapter 5.6 to make sure other people don't run into this error ? I'll figure out how to have the Makefile manage this...

Yes, this is expected. Keep in mind that SRAMs are black box macros, while a memory generated as synflops is a massive sea of flip-flops. This makes it orders of...

You can first start by having Innovus auto-place for you (see discussion here: https://groups.google.com/g/chipyard/c/Xa6cSqKnKOM). I'm going to just answer this question here: https://groups.google.com/g/chipyard/c/ZFm1rQU24Vs