Timer 1 ELDT1C bit (bit 4 of T1CNT)

[jvsTSX]

when ELDT1C is cleared the PWM still updates, according to the datasheet and some tests it should behave as: Clear (0): T1 Low will strictly use the value that was last written in T1 Low Compare before the timer was enabled, writing to T1LC afterwards will result in the value being written but not being updated untill T1CNT is cycled on and off Set (1): T1 Low will update the value automatically after a period (or longer?) completes This behaviour is present on both mode 1 and mode 3