CPLD CRC causes configuration reload from flash

[jboone]

...which means running hackrf_info causes the CPLD bitstream to regress to the contents of flash, which may not be the same as the SRAM configuration loaded at start-up from the firmware image.

Until this is addressed, I've disabled the CPLD CRC function in libhackrf. The CPLD checksum is of limited utility anyway now, because the CPLD configuration is loaded into SRAM from the firmware image at start-up. The contents of CPLD flash are somewhat irrelevant.

┆Issue is synchronized with this Basecamp todo by Unito

[Sasszem]

Does this mean that we can reconfigure the CPLD to a new bitstream without flashing new firmware by writing it into the flash using hackrf_cpld_write and triggering a reload with hackrf_cpld_checksum (using a custom-complied libhackrf or just and older one)?