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decimation and interpolation

Open mossmann opened this issue 11 years ago • 4 comments

Implement decimation and interpolation on the Cortex-M4 to support sample rates lower than 8 Msps over USB. It probably isn't practical to support arbitrary decimation/interpolation rates, but half, quarter, etc. should be possible. A rudimentary implementation without any digital filtering would be useful down to 2 Msps in conjunction with the MAX2837's baseband filter, but we'll probably want to try implementing digital filtering in the long run.

┆Issue is synchronized with this Basecamp todo by Unito

mossmann avatar May 19 '13 04:05 mossmann

Jared implemented the rudimentary decimation option on the CPLD, but we don't yet have firmware that activates it.

mossmann avatar May 14 '14 22:05 mossmann

Why even do it in the CPLD, from my expirence of working with CPLD's space is very limited for anything like even simple decimation. Being a "good" low-pass filter into integer resampler/decimater. This is true if you are doing 100% digital decimation. You hinted at this, what you can do is just just set the band-pass filter in the MAX2837 and sum up number of samples for order of the decimation. i.e. decimating from 8Msps to 2Msps would require 2 10bit adder, 2 10bit register, and 1 4 state state-machine, for both I and Q. This could be extended to 8 to 1 or 16 to 1 decimation at not to much of a penalty in space on the CPLD. How far would we want to take this? It could be useful at max sample rate to get over sampling at lower bandwidths.

What would the input to control this function of the CPLD? is there just some free GPIO on the CPLD I could use or ... ?

It has been a year scene I did any VHDL programming and could use the refresher, I will give it a try. That said why even do this in the CPLD when I would think this could elsily be done on the Cortex-M4? Other then power and simplicity in the micro-controller I am not sure I see much of a reason to use the CPLD for this.

wylie-coyote avatar May 14 '14 23:05 wylie-coyote

Only rudimentary decimation (dropping samples) has been implemented on the CPLD. This can be useful because it makes more CPU time available on the ARM. Anything more sophisticated will have to be implemented on the ARM. For details on the control interface, check the source or talk to Jared (sharebrained).

mossmann avatar May 15 '14 02:05 mossmann

Any progress on this topic? I would like to use the hackrf for some narrow band tx application with a raspberry as host and being able to use a lower sample rate will favor the limited cpu power available...

matteo-campanella avatar Jan 01 '20 07:01 matteo-campanella