Design & implement falliable procs

[RobSpringer]

I'm currently adding Proc support to the frontend, but I'm punting on what it means to fail!() inside one. We will, of course, need to handle this through our stack (DSLX interpreter, JIT, Verilog asserts), but that's a fair body of work.

[cdleary]

@RobSpringer can you update with your current thinking on this?