pcbdl
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Net names + airwires
Nets should be able to get labeled with the net name.
If a net doesn't go anywhere but one pin, it should make a little stub, long enough to fit its name.
Duplicate of https://github.com/nturley/netlistsvg/issues/36
Right now we can simulate this by uncommenting https://github.com/google/pcbdl/blob/0c02c3d4b1e40a7f1138cd6e671640c324dee1af/pcbdl/netlistsvg.py#L203-L204
Done some work on this in my netlistsvg fork. It's essentially almost done.
- [X] Chips have pin names inside them (unrelated to this bug)
- [X] netnames passed to json
- [X] netnames show on random lines if they're named and not power
- [X] netnames show even when there's no net there (an airwire gets generated)

3 more problems left:
- [ ] Code quality for my netlistsvg changes is a little low
- [ ] Sometimes generic parts are still a little thin, especially when there's only one side of the pins. (See U6 in https://google.github.io/pcbdl/examples/servo_micro.power.svg)
- [ ] Resistors and other non generics don't have airwires attached to them (see R501 in https://google.github.io/pcbdl/examples/servo_micro.power.svg)
Let's call this working enough for Jim.
Jim noticed no airwires on resistors and thin chips already.