gvisor Elide WriteGS if the GS is already correct.

Elide WriteGS if the GS is already correct.

Open amscanne opened this issue 5 years ago • 3 comments

This caches the GS value in the ring0.CPU struct, in order to avoid a full pipeline flush in the switch path.

Fixes #2010

Mar 26 '20 17:03 amscanne

This pull request is stale because it has been open 90 days with no activity. Remove the stale label or comment or this will be closed in 30 days.

Jun 25 '20 00:06 github-actions[bot]

@avagin do you think we can revive this patch? It will fix #2010, which has some perf benefits.

Sep 15 '23 17:09 ayushr2

A friendly reminder that this PR had no activity for 120 days.

Jan 14 '24 00:01 github-actions[bot]

This PR has been closed due to lack of activity.

Apr 14 '24 00:04 github-actions[bot]