Add RVV F32-IGEMM

Open bhbruce opened this issue 1 year ago • 1 comments

Support RVV F32-IGEMM with MR=1 & 7, NR=4v.

Feb 16 '24 03:02 bhbruce

Hi @fbarchard This is the RVV IGEMM implementation and NR is also determined by LMUL & VLEN. The main idea is similar to https://github.com/google/XNNPACK/pull/5893.

Feb 16 '24 03:02 bhbruce

Hi Frank, This PR now has several conflicts since tools/generate-gemm-test.py has been refactored. Let's try to approve and merge PR https://github.com/google/XNNPACK/pull/5893 at first. After that, I'll refactor this PR.

Apr 02 '24 00:04 bhbruce

RVV IGEMM test cases has been updated.

Apr 11 '24 08:04 bhbruce