As Fluidnc ESP32 I2S ouput can you add this mode

[Speedjf37]

Hello ,

FastAccelStepper is ok for ESP32 with GPIO ouput !

As Fluidnc I2S ouput can you add this mode ?

const EnumItem stepTypes[] = { { Stepping::TIMED, "Timed" },
                               { Stepping::RMT_ENGINE, "RMT" },
                               { Stepping::I2S_STATIC, "I2S_STATIC" },
                               { Stepping::I2S_STREAM, "I2S_STREAM" },
                               EnumItem(Stepping::RMT_ENGINE) };

Good job ! Thanks. JF

[gin66]

Hello Speedjf37,

thanks for the proposal. A brief look at the I2S-module gives me the impression, that an implementation would need to constantly write hundreds of kiloByte per second in a large ringbuffer (approx. 2-8kB/stepper) for a decent performance. Means a step time resolution in the range of micoseconds. Not sure if I will try this, because there is already a functioning esp32 implementation using rmt-module.

An UNO R4 and a STM32 board are already waiting on my table,. Those have higher priority for me.

If someone would come up with a PR, I would be happy to include it.

[soulslider]

Hello @gin66 and @Speedjf37 ,

@gin66 thank you for your usefull library !

@Speedjf37 This is a great idea for driving cards like MKS-DLC32 where steppers are already wired to i2s output.

[gin66]

Any port, which can be used as I2S-output can be instead connected to rmt-module, too. Thanks to esp32’s gpio- and io-matrix functionality.

[soulslider]

Yes but on MKS-DLC32 boards all (step, dir, enable) pins for the 3 steppers are wired to the same esp32 i2s bus

MKS-DLC32 Schematic

[gin66]

Thanks for this detailed info. That IC demultiplexes the I2S-stream and in the individual bits are the respective signals for the stepper. This means, one I2S would be able to manage multiple steppers. There would be the need to have one generic long I2S-buffer. Every stepper would need to update its respective signals’ bits for the whole buffer based on their individual timing. The bytes need to be ready before the DMA pulls the data in.

Somewhere I read BCLK is max 10MHz and 8bits minimum width, so each byte would represent 1.25us. For high speed operation not really good resolution. Not sure if this BCLK max. frequency is correct.

[Speedjf37]

Max use on I2SO

I2SO bus as 16 bit or 32bit mode . 1 to 4 Demux 8bit

The Mks Tinybee as 2 demux

The board Tindie 6_Pack can drive 6 motors ( I2S0 ) as 3 Demux http://wiki.fluidnc.com/en/hardware/official/6_Pack_Integrated_ESP32

motor 1

ms3_pin: i2so.3 step_pin: I2SO.2 direction_pin: I2SO.1 disable_pin: I2SO.0

motor 2

ms3_pin: i2so.6 step_pin: I2SO.5 direction_pin: I2SO.4 disable_pin: I2SO.7

motor 3

ms3_pin: i2so.11 step_pin: I2SO.10 direction_pin: I2SO.9 disable_pin: I2SO.8

motor 4

cs_pin: i2so.14 step_pin: I2SO.13 direction_pin: I2SO.12 disable_pin: I2SO.15

motor 5

cs_pin: i2so.19 step_pin: I2SO.18 direction_pin: I2SO.17 disable_pin: I2SO.16

motor 6

cs_pin: i2so.22 step_pin: I2SO.21 direction_pin: I2SO.20 disable_pin: I2SO.23