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Published 20 hours ago • verified publisher icon ghdl

vhdl writeline messages not printed

Open laurentiuduca opened this issue 11 months ago • 3 comments

hello, i have also noticed that debug messages (for example writeline) from vhdl sources are not printed to the console during simulation with cxxrtl

is there any way to see the vhdl messages printed considering verilog-vhdl mixed simulation?

laurentiuduca avatar Nov 26 '24 12:11 laurentiuduca