Jorge Marques

## PR Description At the configuration instantiated by the script, ctrl_clk and spi_clk are always synchronous. When axi_spi_engine/ASYNC_SPI_CLK=1, the ctrl_offload intf is fully domain crossed from clk to spi_clk. Thus,...

## PR Description Cherry-picked from the doc-ips branch 7d1c1396f docs: regmap: Add adi_regmap_axi_laser_driver.txt 29e4d2244 docs: Add axi_laser_driver IP core 37ea82ad8 docs: regmap: Add adi_regmap_axi_logic_analyzer.txt a9fa4dd2b docs: Add axi_logic_analyzer IP core...

## PR Description Cherry-picked from the doc-ips branch ae62febfd docs: regmap: Add adi_regmap_clkgen.txt 247a2c6ea docs: Add axi_clkgen IP core 65056417b docs: regmap: Add adi_regmap_axi_adc_decimate.txt 0f2b2f7ea docs: Add axi_adc_decimate IP core...

docs: Improve landing page, categorize IP Cores

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## PR Description Improve the landing page, aiming to create a standard format. Open for discussing. The new landing page has tree toctress to fine-tune the Contents list. Remove proprietary...

ad_gmsl2eth_sl: Rework assign_bd_address

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## PR Description Rework assign_bd_address to only provide objects to assign instead of providing a explicit target_address_space. Aims to fix the error obtained on the CI: ``` ### assign_bd_address -target_address_space...

(CI for #1201) TCL: ad_hpmx_interconnect

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## PR Description Trigger CI for https://github.com/analogdevicesinc/hdl/pull/1201 Added fixes to the o.g. PR and updated affected projects (those touching "ad_cpu_interconnect" IP core directly) Some custom projects might rely on other...

## PR Description The rx_error_r* on the axi_ad9361/xilinx/axi_ad9361_lvds_if.v were not implemented properly. the author intended it to be the inverse of all valid frames combinations {rx_frame, rx_frame_s} but only compared...