DMG-CPU-Inside
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Sprite X matchers
Thanks for your work creating the schematics.
It looks like the 6th from the left sprite X matcher WUNU and WOFO signals are reversed. WOFO is the output when count is 4 from the 0-A counter but it goes into reset instead of clk.
Also is it correct that OAM_A_D7-0 is XOR'ed with inverted H7-0? How does that work?
Also is it correct that OAM_A_D7-0 is XOR'ed with inverted H7-0? How does that work?
This works because OAM_A_D[7:0] and OAM_B_D[7:0] are also inverted. See #57. All data inside the OAM RAM is stored in inverted state.
Thanks. That also explains why the reset to 0x00 works and doesn't put all sprites at X position 0.
Yes, exactly