Add a i_valid for slow inputs (high system_clk/sample_clk ratios)

[hemanthmab]

Waste of extra BRAM or other resources to keep feeding the core k samples every cycle if the input data rate is much slower than system clock (which dftcompact/burst is perfect for). The same thing with the output, the blocks downstream likely can't keep up with k samples every clock cycle. valid signal will improve usability greatly, ready too can help with signaling end of dataset.