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Arm support for fd_tango
Problem
fd_tango currently assumes x86-like memory consistency where a series of stores made on the same thread become visible in the same order on all other threads.
This is not guaranteed without memory barriers on most RISC architectures like aarch64.
Suggested Fix
- Add more fine grained alternatives for FD_COMPILER_MFENCE that provide generic memory barrier behavior (that is just a regular compiler fence on x86, but generates an extra instruction on Arm)
- Update FD_COMPILER_MFENCE uses in fd_tango