f4pga
Create a parser for the XDC file format
XDC is the new file format used for constraints in Vivado. To be able to parse designs which use XDC file format we need a parser for it.
The XDC file format is described here -> https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug903-vivado-using-constraints.pdf
XDC is based on SDC - The Synopsys Design Constraints format. So the parser here -> https://github.com/verilog-to-routing/vtr-verilog-to-routing/tree/master/libs/EXTERNAL/libsdcparse might be useful.
There are key differences between Xilinx Design Constraints (XDC) and User Constraints File (UCF) constraints. XDC constraints are based on the standard Synopsys Design Constraints (SDC) format. SDC has been in use and evolving for more than 20 years, making it the most popular and proven format for describing design constraints.
XDC is a subset of TCL, there is a ANTRL4 grammar for TCL. There is a grammar for ANTRL4 https://github.com/Nic30/hdlConvertor/blob/master/grammars/tcl.g4
GitHub
verilog and vhdl parser module for python. Contribute to Nic30/hdlConvertor development by creating an account on GitHub.
@Nic30 Having a grammar is the first step. Still need to process it into more useful constructs.