esp-pacs
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esp-rs
Peripheral Access Crates for Espressif SoCs and modules
According to the TRM: Only 5 bits of RMT_SYS_CONF_REG defined. - RMT_APB_FIFO_MASK - RMT_MEM_CLK_FORCE_ON - RMT_MEM_FORCE_PD - RMT_MEM_FORCE_PU - RMT_CLK_EN  But lots of reserved bits in the pacs: https://github.com/esp-rs/esp-pacs/blob/c717453df31e5f37c48edd287906bbf09aa82112/esp32h2/src/rmt/sys_conf.rs#L114-L175...
See https://github.com/esp-rs/esp-hal/blob/6fb636be89c2051cb83ec9ed3f99110505b53218/esp-hal/src/rsa/mod.rs#L406-L408 It would be nice if we could be consistent here, too.
https://github.com/esp-rs/esp-hal/pull/1929#discussion_r1713803140
Hi, I'm currently in the process of implementing a Wi-Fi stack for the ESP32 in pure rust and I have to use raw pointer to access the registers, we found...
I am interested in trying to get the internal temperature sensor working and was hoping for some insight/guidance on the best way to do this. It seems like there are...
Adds a SVD patch entry for the SLC peripheral to configure SDIO. Adjusts the base address of the SLCHOST peripheral to its correct offset. ## TODO - [x] define register...
`esp32c6` is missing the registers for the `slc` peripheral (address range 0x6001_7000-0x6001-7fff), and has the `slchost` peripheral starting at the beginning of the `slc` address range. It looked like the...
`svd2rust` has added some new functionality specific to RISC-V devices, see: - https://github.com/rust-embedded/svd2rust/issues/786 - https://github.com/rust-embedded/svd2rust/pull/856 An example of this functionality being applied to a PAC can be seen here: -...
