esp-hal
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esp-rs
no_std Hardware Abstraction Layers for ESP32 microcontrollers
**Still untested at the moment** but I've added eh1 and eh0.2 I2C transaction API to the I2C peripheral, this can also be used to implement proper write_read (see https://github.com/esp-rs/esp-hal/pull/848). Some...
``` Chip type: esp32 (revision v1.0) Crystal frequency: 40MHz Flash size: 4MB Peripheral: MLX90614 VCC: 3V3 GND: GND SDA: GPIO 21 SCL: GPIO 22 ``` Thank you for the awesome...
Actionable items from this investigation: - [x] #1254 - [ ] Replace `const`s this `static`'s if they're referenced in interrupt handling code - [ ] Find a way to get...
### Must - [x] The code compiles without `errors` or `warnings`. - [x] All examples work. - [x] `cargo fmt` was run. - [ ] Your changes were added to...
The epd-waveshare driver (or at least [this](https://github.com/caemor/epd-waveshare.git) fork) tends to send 1-4 bytes (I presume constant command bytes) out of data from DCache. The ESP32-S3 TRM states that accessing DCache...
To be 100% safe, buffers used with the embedded-dma traits _must_ be static. This is because `core::mem::forget` is safe in Rust, and if a user were to forget a driver...
Currently we are _not_ specifying any Cargo features when performing our MSRV (and `clippy`/`rustfmt`) checks in CI. This means that there is the potential for APIs which are _not_ compatible...
In the current DMA abstraction, I miss the option to configure the PSRAM blocksize. In esp-idf, this can be set to 3 possible values: - `#define GDMA_LL_EXT_MEM_BK_SIZE_16B (0)` - `#define...
Apologies for the vague title and the long issue! I'm grateful for all the help you've already given me in getting to this point with your excellent work on the...
