Implement remaining peripheral drivers for `esp-lp-hal`
ESP32-C6
- [ ] Interrupts
- [x]
LP_I2C - [x]
LP_IO - [ ]
LP_TIMER - [x]
LP_UART - [ ]
LP_WDT(?)
ESP32-S2/S3
- [ ] Interrupts
- [ ]
RTC_I2C - [x]
RTC_IO - [ ]
SENS
FYI I'm planning to work on lp-timer for C6 next.
Want to take a look into LP_WDT for C6
Any updates on this?
Which peripherals are you looking for? And for which chip?
timer and interrupts for the c6
It's not my league to try to implement them, sadly
While implementing it for esp-lp-hal would be too complicated for me, maybe setting a few registers would be enough for now?
https://github.com/espressif/esp-idf/blob/d7ca8b94c852052e3bc33292287ef4dd62c9eeb1/components/ulp/ulp_riscv/ulp_core/ulp_riscv_utils.c#L26-L35
It looks like it's that easy?
I'm also going to take a stab at implementing the remaining drivers for the esp32c6, or at least getting interrupts working. Are there any resources/references I should know about besides the ESP-IDF C code, the picorv32 stuff, and the esp32c6 technical reference manual? Are there going to be any major differences between the rust and C code (obviously besides being a different language)?
I looked at the interrupt handling in esp-hal for a while, but it seems like the LP core does interrupts significantly differently. I'll try to mimic the user-facing stuff on that end though.
I'm also going to take a stab at implementing the remaining drivers for the esp32c6, or at least getting interrupts working. Are there any resources/references I should know about besides the ESP-IDF C code, the picorv32 stuff, and the esp32c6 technical reference manual? Are there going to be any major differences between the rust and C code (obviously besides being a different language)?
I looked at the interrupt handling in esp-hal for a while, but it seems like the LP core does interrupts significantly differently. I'll try to mimic the user-facing stuff on that end though.
Thanks for looking into this! I think you've listed all the resources you'll need. There shouldn't be much difference in the code in terms of functionality. We will have stronger opinions on the public facing code though, checkout https://github.com/esp-rs/esp-hal/tree/main/documentation. The DEVELOPER-GUIDELINES, are currently very esp-hal focussed, but 90% should apply to all esp crates.
I started on getting TSENS on ESP32S3 implemented here: https://github.com/esp-rs/esp-hal/compare/main...Takkaryx:esp-hal:feat/esp32s3_tsense
It doesn't work atm, I think there is a register configuration I'm missing somewhere. and it doesn't support interrupt configuration yet.
but I really don't like how it's shaping up after looking through it, it's tacked into the system module to behave similarly to the RISC-V variants, but the Xtensa aren't architected like that. Where can I go to get some better idea of how this is looking to be designed? should it be under a separate SENS portion under system? or should I continue with this setup for now?
also makes the temperature module a bit messy with the 2 implementations gated behind a #[cfg]
I guess this won't get much attention at the bottom of this quite old thread. I would probably get it to a point when it's ready to be filed as a PR and then more people will see it. Maybe it can be polished then or it can get a refactoring afterwards