tapasco
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The Task Parallel System Composer (TaPaSCo)
Currently, only two types of memory are know to TaPaSCo: - The main DDR memory - PE local memory Most devices however have multiple different memories. This issue tracks the...
Right now it is very easy to deadlock the whole system if a PE e.g. reads from the DDR and writes to the DDR but never deals with the result...
For programming the flash, configuration memory files (.mcs) are required. Add a feature to generate them automatically. Xilinx information: [data center cards](https://www.xilinx.com/support/answers/71756.html)
When there are multiple TaPaSCo devices on a host, it should be possible to select the correct device where necessary (e.g. when using tapasco-load-bitstream). This will also need a mapping...
There is currently no easy way to check status information for ECC memory (e.g. is ECC enabled? did ECC errors occur?). Besides this an easy way to configure ECC online...
As more supported plattforms have support for HBM, we should have a common feature for using HBM. The following two use cases come in my mind: 1. Use HBM as...
We will completely rework the `tapasco` CLI. The two main design goals for the new CLI are: * More robust and stable interface, triggering less errors in case of wrong...
We want to provide a software API to the TaPaSCo toolflow. The API should allow users to interface with the TaPaSCo toolflow directly from their own software instead of using...
This feature adds support to use the Xilinx Queue DMA engine as an alternative to the BlueDMA engine on the Alveo cards.
When I'm having one Host application running with exclusive access (in this case tapasco-debug in Debug Mode) and then start another runtime application which tries to acquire exclusive access to...