Is lack of UartBone support causing OpenOCD to report "dtmcontrol is 0"

[snoop911]

I'm using a supported board Colorlight V8 5A-75B.. however litex produces the error: "ValueError: uartbone only supported on i5a-907"

Since A LiteX bridge is needed to use GDB, according to the LiteX Instructions: "JTAG GDB Debugging with VexRiscv CPU"

I tried to build using: python3 -m litex_boards.targets.colorlight_5a_75x --board=5a-75b --revision=8.0 --cpu-type=vexriscv --cpu-variant=standard+debug --uart-name=crossover --with-jtagbone --csr-csv=csr.csv --build

But regardless the SpinalHDL OpenOCD command , dtmcontrol is 0: ./src/openocd -c "adapter driver ftdi"
-c "ftdi vid_pid 0x0403 0x6010"
-c "ftdi channel 0"
-c "adapter speed 1000"
-c "transport select jtag"
-c 'jtag newtap lx cpu -irlen 4'
-c 'target create lx.cpu0 vexriscv -endian little -chain-position lx.cpu -dbgbase 0xF00F0000'
-c 'vexriscv cpuConfigFile cpu0.yaml'
-c 'init'
-c 'reset halt'

Open On-Chip Debugger 0.11.0+dev-04036-ga0220ad30 (2025-08-31-18:28)
Licensed under GNU GPL v2
For bug reports, read
        http://openocd.org/doc/doxygen/bugs.html
adapter speed: 1000 kHz
jtag
4027514880
Info : clock speed 1000 kHz
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: lx.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: ERROR: Error while reading from socket: No error
Error: !!!
Error: Can't communicate with the CPU
Error: !!!
Warn : target lx.cpu0 examination failed
Info : starting gdb server for lx.cpu0 on 3333
Info : Listening on port 3333 for gdb connections
Warn : There are no enabled taps. AUTO PROBING MIGHT NOT WORK!! 
Error: JTAG scan chain interrogation failed: all ones
Error: Check JTAG interface, timings, target power, etc.
Error: Trying to use configured scan chain anyway...
Error: lx.cpu: IR capture error; saw 0x0f not 0x01
Warn : Bypassing JTAG setup events due to errors
Error: ERROR: Error while reading from socket: No error
Error: !!!
Error: Can't communicate with the CPU
Error: !!!
TARGET: lx.cpu0 - Not halted

What makes the Colorlight 5A-75B not capable of uartbone? Why can't crossover+jtagbone serve as gdb litexbridge?