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Change liblitedram/sdram.c to correctly support single x4 IC
With out this changes DDR5 simulation hangs with DQ/DQS ratio = 4
Signed-off-by: Maciej Dudek [email protected]
@enjoy-digital could you take a look?
Thanks @mtdudek, I'll have a closer look very soon.
Hi @mtdudek,
with this new version, the code gets difficult to apprehend. Can you change the PR to keep the previous code but just add support for the new case you want to support. This will allow merging and simplifying the review to try to share the same code for the different case. Thanks.
We can probably close this since covered by https://github.com/enjoy-digital/litex/pull/1512.