Memory map for VexRiscv

[kaolpr]

I've recently came across an issue - I was trying to boot Zephyr on a VexRiscv and it freezed just after liftoff. Removing some CSR-s (specifically reducing number of CSRs to 13) made Zephyr boot successfully. With 15 CSR locations it freezed.

After some (substantial) time of debugging it turned out that changing CSR address in mem_map to 0xe0000000 made it work (was 0xf0000000).

A very rough analysis of SoCRegion decoder led me to conclusion that only a number of most significant bits was taken into account when decoding and it was not enough to differentiate CSR from vexriscv_debug. I'm not entirely convinced to this explanation, so maybe somebody has already had such problem? Is such behaviour of the region decoder expected? If so, can we consider mem_map in VexRiscv valid?

[enjoy-digital]

Thanks @kaolpr, the issue seems to be related to an overlap between CSRs and vexriscv_debug. I'll do a check on this.