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Published 20 hours ago • verified publisher icon enjoy-digital
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Small footprint and configurable PCIe core

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The tlast signal doesn't seem to be working

Hello, I have started using litepcie as a means of communication between FPGA and the host in a recent project. - Hardware: Xilinx Artix7 200T - litexpcie version: The latest...

black-pigeon avatar black-pigeon

Remove usage of `distutils`

`distutils` was removed in Python 3.12, causing litepcie to crash when trying to use it.

Liamolucko avatar Liamolucko

software/user/litepcie_test: set reader_enable, writer_enable in play and record

litepcie_test was broken by 5b9446f11559f2b75000cda07d359275b14940c2, this should fix it

VladimirP1 avatar VladimirP1

how to generate the rtl code of crossbar and dma related .py

I run the script of gen.py but there is no file related with crossbar and dma

constant007 avatar constant007

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Small footprint and configurable PCIe core

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