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QuarterRateGENSDRPHY

Open machdyne opened this issue 2 years ago • 2 comments

I'm trying to implement a Quarter-rate Generic SDR PHY module so that I can run a CPU at 40MHz with the SDRAM at 160MHz. It looked straight-forward at first but I don't really know what I'm doing and haven't had much success. If anyone could provide any tips or examples of how to implement this it would be appreciated.

machdyne avatar Jun 25 '22 06:06 machdyne

I mashed together the code from HalfRateGENSDRPHY and S6QuarterRateDDRPHY, and it's not working, the memtest fails, but maybe somebody can tell me where I'm going wrong?

https://github.com/machdyne/litedram/commit/f9da309ed41c9b0bf726c12a18f53d235c61a547

machdyne avatar Sep 05 '22 10:09 machdyne

Your best bet is to make a PR of your changes to this repo that makes it easier to look at the diff and will (hopefully) be merged.

rowanG077 avatar Sep 07 '22 12:09 rowanG077