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Handling multiple simultaneous revisions of peripheral (ADC on U5)
I’m having trouble implementing the ADCs for the U5 series due to it having multiple simultaneous ADC revisions. Some chips have up to three ADC instances: ADC1, ADC2, and ADC4. While ADC1 and ADC2 are identical, ADC4 is a completely different revision. I haven't seen a setup like this before so I'm unsure on how to best handle it.
The most straightforward solution in my opinion is to treat them as separate peripherals (e.g. adc12_u5.yaml
and adc4_u5.yaml
), but this breaks the pattern of having a generic "adc" peripheral across all chips.
An alternative would be to use a single file with separate blocks, similar to how timers are handled. However due to overlapping fields and enums everything related to ADC4 would need to be prefixed (e.g. ADC4_xxxx
)
Are there any existing examples of this kind of situation, or is there a better way to approach it? Any guidance or feedback would be greatly appreciated!
Thanks!