Incorrect timer versions on STM32H723

[elagil]

This probably also applies to other chips of the H7 variant, but it seems like the H7's timers are using the v1 schema, when most of them should be using the v2 schema. I noticed when trying to use the trigger source ITR5 of TIM2, which is not present in v1.

I found the following mapping.

v1 timers: 6 7 12 13 14 15 16 17

v2 timers: 1 2 3 4 5 8 23 24

Shall I create a pull request?

[Dirbaio]

yes please!

[elagil]

Ok! I will try to do all H7 series parts then.