stm32/c092: missing HSIDIV and wrong register used for setting SYSDIV

[i509VCB]

Per RM0490 Chapter 6.2, in Figure 9, in rcc::Config, the sys_div field is used to wrongly set HSIDIV (https://github.com/embassy-rs/embassy/blob/a51533c0b4edd551a1b9587b9272026b0b256d54/embassy-stm32/src/rcc/c0.rs#L96).

There is also no field in the rcc config to configure HSIDIV (divider for HSISYS). With this issue I cannot appear to setup the chip to run the core at 48 MHz (I could only get it to run at 12 MHz by verifying with MCO).

This might apply to some other chips as well.