embassy-rs
stm32n6 support
So, embassy-stm32 is missing the whole family stm32n6. Are there plans on adding it soon?
There was some work in stm32-data here, for the rcc registers: https://github.com/embassy-rs/stm32-data/pull/612
It needs:
- in stm32-data:
- Add registers for other core blocks (syscfg, exti, flash, maybe others)
- in embassy-stm32:
- Add features to Cargo.toml
- Add RCC implementation
- Fix whatever build issues show up
There's no one working on it AFAIK. PRs welcome.
I'll give it a look over the upcoming weekend, I've got a stm32n6 devkit lying around.
Hey @Dirbaio since Matrix is down at the moment, I'll ask here. This is my first time working with stm32 chips so I might be asking dumb questions. I'm looking at metadata generated for stm32n657x0 (metadata_0774.rs) and I noticed rcc is set to None for DCMI peripheral, which is not correct.
Could you give me a pointer to what actually generates the rcc field for peripherals, and why it would be working for CSI and DCMIPP and not DCMI?
Also is there some additional documentation describing the process of adding a new family from start to finish? I'm not quite clear on which parts are generated from headers and svd files and which parts need to manually created.
Thanks!
I noticed rcc is set to None for DCMI peripheral, which is not correct. Could you give me a pointer to what actually generates the rcc field for peripherals, and why it would be working for CSI and DCMIPP and not DCMI?
It searches the rcc for fields named DCMIEN, DCMIRST. The issue is most likely the fields are named something different because ST is often inconsistent, the fix is renaming them.
relevant code is this https://github.com/embassy-rs/stm32-data/blob/main/stm32-data-gen/src/rcc.rs
Also is there some additional documentation describing the process of adding a new family from start to finish? I'm not quite clear on which parts are generated from headers and svd files and which parts need to manually created.
There's nothing special that needs to be done in stm32-data for a new familiy. The process I follow is basically trying to build embassy-stm32 then fix compile errors. If it complains registers for some peripheral are missing, add them in stm32-data following the "add a new peripheral" instructions in the readme.
Is there any update on this? @ionspin are you still planning to work on it? I would be happy to test something, I have a board around.
@jobobob I did some work here https://github.com/embassy-rs/embassy/pull/4714
For that to work, you also need to clone my fork of stm32-data
Is there any update on this? @ionspin are you still planning to work on it? I would be happy to test something, I have a board around.
@jobobob please do, I've started looking into it, but I didn't have time to make any real progress, I might be able to jump in start of November and join the work you and @everdrone are doing. Sorry for not updating the state earlier.
With the help of everyone in the matrix chat I managed to run a simple blinky using a cortex_m_rt::entry point. After that I got stuck trying to have an embassy_executor based program running because I think I cannot tell the chip to enable debug during sleep mode (wfe instruction from the executor).
Feel free to ping me in the embassy matrix channel.
The just merged PR #4714 added basic support. I tested it using my Nucleo board and can confirm that the LED blinks. 👍
Do we know yet what it will take to include native support for the built-in NPU, HW cryptography, and NeoChrom graphics accelerator? It's one thing working with it in the STM32CubeIDE, I am not sure where to start with implementing it here but would like to help.
I have a Nucleo STM32N657X0 board I can use for testing but am unaware of any other branches besides #4714 which is already confirmed working.
These peripherals link to static libraries. The plan, if someone wants to do it, is to add the static libraries to stm32-bindings. I will be able to help more with this in a few days.
@EzraWolf feel free to submit the PR to embassy-rs/stm32-bindings to add the ai runtime library.