Kevin Laeufer

We hope to eventually support a PSL like language for writing specifications. It will be a lot of work though and thus there are currently no concrete plans for the...

Could you provide an example of a custom stage that we could use to mockup a use case scenario? There are a couple of things I am trying to understand:...

One potential solution may be to allow users to run their stage and then just provide the resulting annotations to `chiseltest`. The biggest problem would be that the user would...

> I think a concrete example might be rocket-chip's `ElaborationArtefact`s phase: https://github.com/chipsalliance/rocket-chip/blob/86a2f2cca699f149bcc082ef2828654a0a4e3f4b/src/main/scala/stage/phases/GenerateArtefacts.scala Thanks. Would something like this work for you: ```.scala val circuit = new RocketChipStage().run(Seq(RunFirrtlTransformAnnotation(new LowFirrtlEmitter), EmitCircuitAnnotation(classOf[LowFirrtlEmitter]))) test(circuit) {...

> Do you have an idea of what type `circuit` would be? It would be an `AnnotationSeq`. We would have to properly define what annotations `chiseltest` requires. Mostly that should...

@debs-sifive I have been thinking about this a bit more and I have a proposal. We would have to add the following class or trait to Chisel (the name isn't...

> Is there not already an annotation that is expected to contain the Scala circuit (top level Module pointer)? If there was, would we really have to change Chisel to...

> The fir spec either needs to evolve or interesting uses will just start using a super-set. Circt/FIR is quite happy, and planning, on supporting a superset of the fir...

This needs a proof of concept that shows a QoR improvement for a particular test case. Then we can think about whether it is worth to implement this optimization.

Result from today's dev meeting: - needs an annotation to enable, should be off be default - should use `logger.info` to inform the user when successfully removing a loop