clear
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efabless
Hello, Is there a tutorial to explain step by step how to synthesize a design and place & route for CLEAR eFPGA ? And also, is there static timing analyser...
I have been seing some commits to develop clear eFPGA since mid-March. What is the current situation of clear eFPGA project? I saw some issues are not answered, is everything...
tapeout scripts implemented incorrectly, it picked up the defaults blocks that were pushed on this repo and didn't generate new ones. This ended up in clear tapeout to have the...
https://github.com/efabless/clear/blob/5b53c091bdd872c8b3c8d9e61dcb997ccf2ccdba/openfpga/input/scripts/openfpga.sh#L10 the xml folder and files are not available, specifically, auto_sim_openfpga.xml is not there, although openfpga_arch2x2.xml is arch folder instead.
Added instructions for bitstream generation with pin mapping for the FPGA fabric using OpenFPGA and provided the modified configuration files for it.
There is an interactive.tcl script that includes interactive flow commands. How to use it to harden fpga_core. Also there is a synt_top.tcl written in config.tcl that is missing. @mkkassem @Manarabdelaty
This issue needs to be resolved or waived before tapeout. ``` https://gitlab.com/api/v4/projects/36768579/repository/files/tapeout%2Foutputs%2Foas%2Fcaravel_2204289a.oas/raw?ref=main 15adb4f6dd8e482041f8bad67a281c75c6fdd0cd caravel_2204289a.oas ``` Some of the power nets that are unused in `user_project_wrapper` do not match the connections...
This issue needs to be resolved or waived before tapeout. ``` https://gitlab.com/api/v4/projects/36768579/repository/files/tapeout%2Foutputs%2Fverilog%2Fgl%2Fcaravel.v/raw?ref=main a68120b314fa1cd532dcaf95cb9fe5ee4e9ae7d4 caravel.v ``` Block names aren't being replaced in `caravel.v`. ``` gpio_defaults_block \gpio_defaults_block_0[0] ( ... ); gpio_defaults_block \gpio_defaults_block_0[1]...
This issue needs to be resolved or waived before tapeout. ``` https://gitlab.com/api/v4/projects/36768579/repository/files/tapeout%2Foutputs%2Foas%2Fcaravel_2204289a.oas/raw?ref=main 15adb4f6dd8e482041f8bad67a281c75c6fdd0cd caravel_2204289a.oas ``` The layout for `simple_por` is an older version that uses a common ground for both...