iverilog syntax error on Caravel

[emre-goncu]

Since my RTL code have some "typdef struct" statements, I've added the parameter "-g2005-sv" for iverilog to the related lines in the Makefile given in the path "caravel_user_project/mgmt_core_wrapper/verilog/dv/make/env.makefile". But after those changes, I get the below errors, while in the verification phase:

caravel/verilog/rtl/caravel.v:614: error: Invalid module instantiation

[marwaneltoukhy]

@emre-goncu you added an iverlog parameter in the environment makefile? the env.makefile is nothing but a makefile that exports some global variables, that infact can be overwritten by exporting them from outside the makefile. I don't really understand your change.

[emre-goncu]

Sorry about that! I wanted to mention "sim.makefile" not "env.makefile".

[kauser-rl]

It might be related to this.