threadx

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### Objective Expand ThreadX support to handle RISC-V ISA extensions and enable optional features such as vector support where applicable. ### Deliverables - [ ] Identify and document supported RISC-V...

fdesbiens

### Objective Provide an example build configuration and verification setup using QEMU “virt” machine for RISC-V32 GNU. ### Deliverables - [ ] Add an example build tree / CMake configuration...

fdesbiens

### Objective Create a complete GCC toolchain-compatible ThreadX port targeting 32-bit RISC-V (RV32) based on the existing 64-bit port and the existing 32-bit IAR port. ### Deliverables - [ ]...

fdesbiens

### Objective Improve code quality and maintainability of the existing RISC-V64/GNU ThreadX port. ### Deliverables - [ ] Improve and expand code comments to describe design intent, context switch logic,...

fdesbiens

basic processing case shows no results with O2

4

## PR checklist - [ ] Updated function header with a short description and version number - [ ] Added test case for bug fix or new feature - [x]...

hotislandn

User @hotislandn brought to our attention a GCC optimisation issue in PR #480. We must investigate the code sample and provide feedback.

fdesbiens

Invalid Entry Pointer When Compiling and Running Linux Port (64bit version)

2

## Description When creating a ThreadX task and passing a pointer to the task's entry function, the pointer is cast to a 32-bit value (ULONG). However, on a 64-bit Linux...

stevo01

Array out-of-bounds checking problem caused by compilation optimization level - O2

2

**Describe the bug** I compile the demo_threadx code with `-O2` flag, but, tx_thread_system_suspend.c is occur a error about array bounds. I try to change the level of optimize to `-O1`,...

XiaoSenLuo

The diagram found in README.MD was inherited from Microsoft and must be replaced by an Eclipse-branded one. I exported the relevant slides in this document: https://docs.google.com/presentation/d/1g_SLliZ6WRKbKtrx2kmlHbKpmjlTQdf9ovyr8EXqi8Y Please create a PNG...

fdesbiens

Seeking Assistance: Porting ThreadX to Zynq-7020 in SMP Mode

1

Dear ThreadX Support Team, I am currently working on porting the latest version of the ThreadX real-time operating system to a Xilinx Zynq-7020 SoC (Dual-core ARM Cortex-A9) and aim to...

showna