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FPU support RISCV-64

Open Alexbruliau opened this issue 1 year ago • 1 comments

Describe the bug FPU is deactivated inside tx_thread_schedule.S v6.4.1

image

Is it the correct behavior ? I would expect the FS bit from the mstatus not to be reset to 0. Otherwise it will cause a trap if you try to access a FP register afterwards.

Alexbruliau avatar May 29 '24 13:05 Alexbruliau

Oops, I had modified there as follow, and it work well: #ifdef __riscv_flen li t0, 0x3880 # Prepare MPIP #else li t0, 0x1880 # Prepare MPIP #endif

xuzihan351 avatar May 30 '24 06:05 xuzihan351

Closing this issue due to inactivity. Feel free to reopen.

fdesbiens avatar Feb 27 '25 15:02 fdesbiens