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RISCV fpu context save and restore according to the MSTATUS.FS

Open xuzihan351 opened this issue 2 years ago • 7 comments

RISCV has a FS filed in MSTATUS, it indicates the status of the fpu. It can be initial, clean, dirty of off. When dealing with the fpu context save and restore, the FS filed may help to increase the preformence of the context switching. When the MSTATUS.FS is clean or off, the context saving and restoring can be skip. Is it possible to implement this feature in the future?

xuzihan351 avatar Nov 15 '23 09:11 xuzihan351

This is definitely possible... tx_thread_schedule.s, tx_thread_system_return.s, tx_thread_context_save.s, and tx_thread_context_restore.s are the likely places for the enhanced logic.

williamelamie avatar Feb 05 '24 21:02 williamelamie

Did you find out any issues related to FPU when porting to RISC-V ?

Alexbruliau avatar May 29 '24 11:05 Alexbruliau

No issues found at the moment

xuzihan351 avatar May 30 '24 01:05 xuzihan351

Not even this kind of https://github.com/eclipse-threadx/threadx/issues/389 ?

Alexbruliau avatar May 30 '24 06:05 Alexbruliau

That is a bug, and I had fix it locally.

xuzihan351 avatar May 30 '24 07:05 xuzihan351

thanks you targeted a mpfs250 board?

Alexbruliau avatar May 30 '24 16:05 Alexbruliau

Not that. I am targeting HPMicro series boards

xuzihan351 avatar May 31 '24 00:05 xuzihan351

Closing this issue due to inactivity. Feel free to reopen.

fdesbiens avatar Feb 27 '25 15:02 fdesbiens